20afStanley+

Canvas 1 Layer 1 ÷ 2 12 13 14 15 16 17 18 20 11 Vdd 2 1 3 4 6 8 Vss 9 10 5 7 19 Saw R-2R DAC LFSR ÷2 8-bit Counter ÷ 2 ÷ 2 ÷ 2 ÷ 2 ÷ 2 ÷ 2 FF Mux ÷ 256 PPM Sine Vdd Reset Clock Divide I 4 I 2 I 1 I 3 AM Ring PU PD Buf I 2 I 1 HF Noise ÷ 3 Mux

Description

The 20afStanley+ integrates many common circuits used by the experimental music community and often associated with Stanley Lunetta who shared them widely in the early days of TTL and CMOS. Also available are some circuits that were unavailable to designers of the venerable 4000 and 74HC series ICs.

Power (pin 1) and Ground (pin 11) follow the unusual arrangement of all the 20af series. A 100nF decoupling capacitor is recommended as close to the power supply pins as possible. Additional decoupling may be valuable when large currents are switched by the buffer transistors (pins 10 and 12).

All the input pins (2-9) feature a low voltage input threshold: around 1V. This is so that the chip can be clocked from external oscillators which are being voltage-starved - a common modulation technique in the CMOS audio experimental community.

The low input threshold and availability of an open-drain nMOS output (pin 10) allows the 20afStanley+ to be integrated into designs with mixed 3.3volt and 5v rails.

Pin 2 (HF) sources a clock for a linear-feedback shift register configured to produce a pseudorandom bit sequence on pin 20.
Canvas 1 Layer 1 20 LFSR 2

HF also clocks an 8-bit binary counter connected to a DAC. The 1 Volt maximum amplitude output from the DAC (Saw) is buffered on pin 19 and derived from an on-chip bandgap reference. An overflow pulse from this counter is output on pin 18. With Reset unused this output provides a short pulse every 256 counts of the counter. A rising edge on the Reset pin resets the counter. This outputs a pulse on 18 and also restarts the sawtooth waveform. Interesting and useful waveshapes can be created by orchestrating the timing relationship between the HF clock and Reset pins.

The counter is set to 255 at power on. If the clock and reset are left grounded the output at pin 9 can be used as a 1V voltage reference.
Canvas 1 Layer 1 18 2 3 19 Saw R-2R DAC 8-bit Counter ÷ 256 Overflow Reset HF

The Clock input (pin 4) drives a sine wave approximator that uses Pulse Position Modulation (PPM). An external reconstruction filter is required to obtain a smooth sinusoidal output.

Pin 4 also clocks a divider chain consisting of 7 divide-by-2 circuits that are multiplexed in to the Divide pin (14) according to the 3-bit encoding established on I4 (pin 5), I2 (pin 6) and I1 (pin 7).

I3 (pin 8) inserts a 50% duty cycle divide-by-3 circuit into the output.
Canvas 1 Layer 1 ÷ 2 14 4 6 8 5 7 ÷ 2 ÷ 2 ÷ 2 ÷ 2 ÷ 2 ÷ 2 Mux Clock I 4 I 2 I 1 I 3 ÷ 3 Mux

The multiplexor control pins (5,6, 7 and 8) are shared by two other functions.

Pin 15 outputs the XOR function from the input pins 5, 6 and 8.
Produced by OmniGraffle 7.5 2019-10-25 18:15:11 +0000 Canvas 1 Layer 1 15 Ring I 2 I 3 I 4 5 6 8

Pin 16 outputs the result of chain of NOR gates applied to inputs on 5, 6 and 7.
Produced by OmniGraffle 7.5 2019-10-25 18:02:10 +0000 Canvas 1 Layer 1 16 AM I 2 I 1 I 4 5 6 7

Pin 9 is the input to a CMOS inverter built from high-current complementary transistors. Their drains are separately available on pin 10 (Pull Down) and pin 12 (Pull up). Pin 13 provides the divide by 2 output of a flip-flop clocked by pin 9. This is intended to provide a square wave output in relaxation oscillator applications using the buffer transistors in their capacity to discharge and/or recharge a timing capacitor. A 2uS delay is provided from the input to control rapid recharge and discharge rates.

Package

20-pin TSSOP: 6.5 x 6.4 x 1.2 mm
By Special Order: 20-pin STQFN: 2 x 3 x 0.55 mm
20-pin TSSOP: 6.5 x 6.4 x 1.2 mm 3.3V Automotive Qualification

Operating Conditions

1.8V-5V
–40 to 85°C

Applications

  • Sound Design
  • Circuit Bending and Experimentation
  • Companion for 40106/4093 Relaxation Oscillators
  • Rhythm Sequences
  • DIY Synthesizers
  • Random and Noise music
  • Chaos Oscillators
  • Experimental Music
  • Synthesis voice sources
  • VCOs
  • Level Shifting
  • Signal Generators
  • Logic Probes
  • LED flashers and lighting effects
  • Application Notes

    The 20afStanley+ is a swiss-army knife of handy CMOS circuits used in audio applications. Just like real swiss-army knives it may not be possible to use all the functions at once. The colors of the table below describe functions that share input pins.

    Function Input Output Discrete Audio LF
    LFSR 2 20 CD4006, CD4070 Noise Rhythm
    Staircase 2,3 19 CD4520, DAC08 Sawtooth LFO
    by 256 2,3 18
    Sine 4 17 Modulation LED
    Divider 4,5,6,7,8 14 CD4512, CD4520 Sequencing Rhythm
    AM 5,6,7 16 CD4001 Metallic Bursts
    Ring 5,6,8 15 CD4070 Inharmonics Edges
    by 2 9,13 13 CD4013 Square Wave LED
    Buffer 9 10,12 CD4007, CD40107 Oscillators Relays
    Motors
    Power 1
    Ground 11

    As with all CMOS circuits unused inputs should not be left to float. Tying them to ground is the most useful solution for the 20afStanley+.

    The guiding question driving the design of this chip was "what are the most useful functions involving a small number of inputs and outputs?". The answer was drawn mostly from the long history of audio applications of CMOS circuits and from new designs developed by nOmni to take advantage of the availability of mixed signal functions.

    Oscillators

    Most of the 20afStanley+ circuit blocks are intended to be clocked externally. Many interesting sounds are obtained from asynchronous clocks, so a hex schmitt inverter (CD40106 or 74HC14) is a convenient source of relaxation oscillators. Voltage control of the frequency of these inverters can be achieved by changing their power supply voltage. The inputs of the 20afStanley+ were tuned to a low 1 Volt threshold to maximize the dynamic range of power supply modulation ("Voltage Starvation"). For these situations the 74LV14 is worth considering as it operates from 1 to 5.5 volts.

    Canvas 1 Layer 1 100K 10nF

    CMOS versions of the 555 timer may be useful as they afford moderate amounts of frequency modulation via their pin 5.

    The inverting buffer of the 20afStanley+ has been tuned for building relaxation oscillators using circuits that favor voltage or current control.

    Voltage Control

    If the resistor of the usual schmitt trigger relaxation oscillator is replaced by a diode the charging rate of the capacitor can be controlled by an externally controlled current source. A constant current source will result in a sawtooth wave at the capacitor node. An approximate sawtooth is obtained with a resistor sourcing current from the power supply or an external voltage.

    Canvas 1 Layer 1 100K 10nF V DD

    Although the inverting buffer of the 20afStanley+ is not a Schmitt trigger, the same circuit can be used as long as the capacitor is reliably discharged below the 1 volt input threshold. This was achieved with the addition of a 2uS delay from the input pin to the output drive transistors. In the diagrams below the Inverter symbol has been enhanced to represent the delay with a Greek delta to represent delay and the split drain outputs above and below the inversion symbol.

    The 2uS timing long enough to discharge capacitors up to 0.01uF. The low threshold 1V gives a good dynamic range of voltage control: 4:1 in the case of 5V VDD. With Schottky diode protection of the input node higher voltages (e.g., Eurorack +12v) may be used for wider frequency range.

    A narrow pulse output can be obtained by adding a pull-down resistor to the p-mos drain output (pin 12). Alternatively the square wave divider output (pin 13) may be used.

    Canvas 1 Layer 1 100K 10nF V > 1v 9 10 12 10K

    Current Control

    Canvas 1 Layer 1 100K 10nF

    Instead of rapidly discharging a capacitor, the p-channel pull-up transistor can be used to recharge the capacitor. The discharge rate is then controlled by a current sink. This produces a sawtooth ranging in amplitude from the power rail down to the 1V switching threshold of the inverter. This circuit is suitable for control by common exponential converter designs to create a 1V/Octave oscillator core. This circuit allows for a very wide range of oscillation frequencies from infra to ultrasonic.

    Canvas 1 Layer 1 10nF 9 10 12 10K V DD 100K V < 1v

    Dual Inverter

    The well-known two-inverter astable is realized by connecting the open drains of the buffer and adding an inverter created from the divider or logic sections. This oscillator has the disadvantage that all the timing components are floating so it is not easy to frequency modulate. On the other hand it is useful to obtain low oscillation frequencies with small capacitors, e.g., for LED flashing.

    LED driving

    Flasher

    LEDs can be added in both orientations between ground and the RC node of the dual inverter to produce brief flashes, brief pauses in light or alternating flashes.

    Pulsating LED

    Driving an LED from the Sine wave output produces a pulsating effect or at lower frequencies an accelerating/decelerating flashing effect.

    Flickering LED

    The flickering LED effect usually used with yellow LEDs to simulate candle light is easily obtained by driving an LED from the noise output.

    Patterning with Dividers

    Combining small number dividers and a sinusoidal strobe with an RGB LED assembly produces regularly cycling patterns. This regularity can be disrupted to produce interesting patterns by clocking the dividers from the noise source.

    Logic Functions

    Although they share inputs, the NOR chain and XOR gates can be used independently by setting one or both of the common inputs to VDD and using the remaining inputs.

    Two separate Inverters

    Separate Inverter and XOR gate

    Buffer and Inverter

    Combining the NOR chain and XOR gates provides useful functions

    Both Edge Detector

    H-bridge

    SR latch

    Combining the NOR chain XOR gates and delayed inverting buffer produces a flexible ring oscillator.

    Ring Oscillator

    The timing of the oscillator is established by the delay in the inverting buffer and will be approximately 250KHz. The oscillator is gated using Pin 7. The oscillator output can be obtained as a square wave at half the frequency from the divider at pin 13. It can be obtained from the XOR gate output at pin 15 as an internally buffered output by tying pin 8 to one of the supply rails. Connecting pin 8 to pin 12 results in a narrow pulse train. Pin 8 can also be used to ring modulate with an external source.

    The 250KHz clock can be used to drive the saw-tooth counter on pin 2, resulting in a pulse wave (pin 18) and sawtooth (pin 19) at approximately 1kHz.

    Level Conversion

    3.3v to 5V non-inverting

    3.3V to 5V inverting

    3.3V to 5V and lower non-inverting

    3.3v to 5V and lower inverting



    Copyright 2019. Adrian Freed. All Rights Reserved.